IP PortfolioCompute acceleratorsdata_offload
of_acc_regex
Regular expression and DPI engine
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 2
Multi-pattern matching engine combining literal prefilters with NFA and DFA evaluation for intrusion detection and log search.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| data_in | in | AXI4-Stream | 128 | |
| match_out | out | AXI4-Stream | 64 |
Standards
- POSIX.1-2017 (ERE)
More in data_offload
| ID | Block | Maturity |
|---|---|---|
| of_acc_deflate_comp | DEFLATE compressor | planned |
| of_acc_deflate_decomp | DEFLATE decompressor | planned |
| of_acc_zstd | Zstandard codec | planned |
| of_acc_lz4_snappy | LZ4 and Snappy codec | planned |
| of_acc_pkt_parser | Programmable packet parser | planned |
| of_acc_match_action | Match-action pipeline stage | planned |
| of_acc_hash_table | Hash table lookup engine | simulated |
| of_acc_traffic_mgr | Traffic manager | planned |
| of_acc_ebpf | eBPF packet processor | planned |
| of_acc_toe | TCP offload engine | planned |