IP PortfolioAnalog and mixed-signalpower_management
of_ams_ldo_lownoise
Low-noise LDO for RF and clock supplies
Maturity plannedTargets ASIC (CMOS) onlyDifficulty HardPriority 2
High-PSRR, low output noise LDO with filtered reference for PLL, VCO and data converter supplies.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| vin | inout | analog | 1 | |
| vout | inout | analog | 1 | |
| en | in | serial | 1 |
Standards
No external standard applies.
More in power_management
| ID | Block | Maturity |
|---|---|---|
| of_ams_ldo | General-purpose LDO regulator | planned |
| of_ams_ldo_capless | Capacitor-less LDO | planned |
| of_ams_ldo_digital | Digital LDO | planned |
| of_ams_ldo_hv | High-voltage input LDO | planned |
| of_ams_buck | Synchronous buck converter | planned |
| of_ams_buck_multiphase | Multiphase buck controller | planned |
| of_ams_boost | Boost converter | planned |
| of_ams_buck_boost | Four-switch buck-boost converter | planned |
| of_ams_dcdc_sc | Switched-capacitor DC-DC converter | planned |
| of_ams_charge_pump | Charge pump | planned |