IP PortfolioAnalog and mixed-signalaudio

of_ams_pdm_mic_iface

PDM microphone decimator

Maturity simulatedTargets FPGA + ASICDifficulty EasyPriority 1

CIC and half-band decimation chain that converts one or two PDM microphone bitstreams to PCM samples.

Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAPB control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request
pdminserial1 
pdm_clkoutclock1 
pcmoutAXI4-Stream24 

Standards

No external standard applies.

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