IP PortfolioDatapath and DSPcompression
of_lz4_codec
LZ4 compressor and decompressor
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 2
LZ4 block and frame format compression with a hash-table match finder and a sequence-parallel decompressor.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| s_in | in | AXI4-Stream | 64 | |
| m_out | out | AXI4-Stream | 64 |
Standards
No external standard applies.
Notes
LZ4 block and frame formats are defined by the reference implementation documentation, not a standards body.
More in compression
| ID | Block | Maturity |
|---|---|---|
| of_huffman_dec | Canonical Huffman decoder | planned |
| of_deflate_dec | DEFLATE / gzip / zlib decompressor | planned |
| of_deflate_enc | DEFLATE / gzip compressor | planned |
| of_zstd_dec | Zstandard decompressor | planned |