IP PortfolioPhysical IPiii-v device libraries
of_inp_hbt_lib
InP DHBT device library
Maturity plannedTargets III-V processDifficulty Very hardPriority 2
Parameterized InP double-heterojunction bipolar transistor cells for high fT/fmax circuits, with emitter width and length options.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| base | inout | RF | 1 | |
| collector | inout | RF | 1 |
Standards
No external standard applies.
Notes
Dyber, Inc. in-house GaAs and InP process; device models and rules come from the dyber_iiiv PDK and run-1 measurements.
More in iii-v device libraries
| ID | Block | Maturity |
|---|---|---|
| of_gaas_phemt_lib | GaAs pHEMT device library | planned |
| of_gaas_hbt_lib | GaAs HBT device library | planned |
| of_inp_hemt_lib | InP HEMT device library | planned |
| of_inp_pic_lib | InP photonic building block library | planned |
| of_gaas_vcsel_lib | GaAs VCSEL and photodiode library | planned |
| of_iiiv_diode_lib | III-V Schottky and varactor diode library | planned |