IP PortfolioInterface controllersi2c
of_i2c_master
I2C master
Maturity fpga-routedTargets FPGA + ASICDifficulty EasyPriority 1
I2C controller-mode block supporting Standard, Fast and Fast-mode Plus with clock stretching and repeated start.
FPGA-routed. The block meets timing on a routed FPGA netlist at a stated clock and its testbench passes on that netlist. It has not yet run on a board or in silicon.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| scl | inout | serial | 1 | |
| sda | inout | serial | 1 |
Standards
- NXP UM10204 I2C-bus specification Rev. 7.0
More in i2c
| ID | Block | Maturity |
|---|---|---|
| of_i2c_slave | I2C slave | simulated |
| of_i2c_multimaster | I2C multi-master controller | simulated |
| of_smbus_pmbus | SMBus/PMBus controller | planned |