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of_mil1553

MIL-STD-1553B controller

Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2

MIL-STD-1553B bus controller, remote terminal and bus monitor with Manchester II encoding, dual-redundant bus A/B and message tables.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAPB control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request
bus_a_txoutparallel2 
bus_a_rxinparallel2 
bus_b_txoutparallel2 
bus_b_rxinparallel2 

Standards

  • MIL-STD-1553B

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