IP PortfolioInterface PHYsline_xcvr
of_rs485_xcvr
RS-485 transceiver
Maturity plannedTargets ASIC (CMOS) onlyDifficulty MediumPriority 3
Half-duplex RS-485/RS-422 transceiver with fail-safe receiver, slew-rate options and short-circuit protection.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| bus | inout | analog | 2 | |
| txd | in | serial | 1 | |
| rxd | out | serial | 1 | |
| de | in | serial | 1 |
Standards
- TIA/EIA-485-A
More in line_xcvr
| ID | Block | Maturity |
|---|---|---|
| of_can_xcvr | CAN / CAN FD transceiver | planned |
| of_lin_xcvr | LIN transceiver | planned |
| of_mil1553_xcvr | MIL-STD-1553 bus transceiver | planned |
| of_arinc429_xcvr | ARINC 429 line driver and receiver | planned |