IP PortfolioVideo, imaging and audiovideo_processing
of_mm_vio_quality_metrics
Video quality metrics engine
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 3
Computes PSNR, SSIM and blockiness metrics between reference and processed frames for encoder tuning.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| ref_pix | in | AXI4-Stream | 30 | |
| test_pix | in | AXI4-Stream | 30 | |
| metrics | out | AXI4-Stream | 64 |
Standards
No external standard applies.
More in video_processing
| ID | Block | Maturity |
|---|---|---|
| of_mm_vio_deinterlace | Motion-adaptive deinterlacer | planned |
| of_mm_vio_chroma_resample | Chroma resampler | simulated |
| of_mm_vio_tpg | Video test pattern generator | simulated |
| of_mm_vio_vtg | Video timing generator | simulated |
| of_mm_vio_osd | On-screen display overlay | planned |
| of_mm_vio_frame_buffer | Video frame buffer DMA | planned |
| of_mm_vio_crop_pad | Region of interest crop and pad | planned |
| of_mm_vio_anc | Ancillary data and audio embedder | planned |
| of_mm_vio_st2110 | SMPTE ST 2110 video packetizer | planned |
| of_mm_vio_aes67 | AES67 audio over IP packetizer | planned |