IP PortfolioAnalog and mixed-signalpower_management
of_ams_pmbus_telemetry
Power telemetry and PMBus slave logic
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2
Digital block that collects voltage, current and temperature readings from converter ADCs and exposes them as PMBus commands.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| scl | inout | serial | 1 | |
| sda | inout | serial | 1 | |
| samples | in | valid-qualified bus | 16 |
Standards
- PMBus 1.3
- SMBus 3.1
More in power_management
| ID | Block | Maturity |
|---|---|---|
| of_ams_ldo | General-purpose LDO regulator | planned |
| of_ams_ldo_capless | Capacitor-less LDO | planned |
| of_ams_ldo_lownoise | Low-noise LDO for RF and clock supplies | planned |
| of_ams_ldo_digital | Digital LDO | planned |
| of_ams_ldo_hv | High-voltage input LDO | planned |
| of_ams_buck | Synchronous buck converter | planned |
| of_ams_buck_multiphase | Multiphase buck controller | planned |
| of_ams_boost | Boost converter | planned |
| of_ams_buck_boost | Four-switch buck-boost converter | planned |
| of_ams_dcdc_sc | Switched-capacitor DC-DC converter | planned |