IP PortfolioAnalog and mixed-signaldata_converters
of_inp_hbt_flash_adc
InP DHBT flash ADC
Maturity plannedTargets III-V processDifficulty Very hardPriority 2
Few-bit flash ADC in InP DHBT with very high sample rate for direct RF sampling and optical-link receivers, complementing the existing InP DAC and track-and-hold entries.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ain | in | differential pair | 1 | |
| clk | in | differential pair | 1 | |
| dout | out | differential pair | 4 |
Standards
No external standard applies.
More in data_converters
| ID | Block | Maturity |
|---|---|---|
| of_ams_adc_sar | SAR ADC | planned |
| of_ams_adc_sar_hr | High-resolution SAR ADC with calibration | planned |
| of_ams_adc_pipeline | Pipelined ADC | planned |
| of_ams_adc_sd_audio | Audio delta-sigma ADC | planned |
| of_ams_adc_sd_precision | Precision delta-sigma ADC | planned |
| of_ams_adc_ti_rf | Time-interleaved RF-sampling ADC | planned |
| of_ams_adc_flash | Flash ADC | planned |
| of_ams_adc_incremental | Incremental ADC | planned |
| of_ams_adc_vco | VCO-based ADC | planned |
| of_ams_adc_housekeeping | Housekeeping ADC with input mux | planned |