IP PortfolioAnalog and mixed-signaliii_v

of_ams_iiiv_laser_bias

Laser and VCSEL bias controller

Maturity plannedTargets III-V processDifficulty MediumPriority 2

Automatic power control loop with monitor photodiode readout and bias current DAC for edge-emitting lasers and VCSELs.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAPB control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request
mpdinoutanalog1 
ibiasinoutanalog1 
setpointinparallel12 

Standards

No external standard applies.

Notes

Companion to Dyber, Inc. InP and GaAs light sources.

More in iii_v

IDBlockMaturity
of_ams_iiiv_hbt_bandgapInP HBT bandgap referenceplanned
of_ams_iiiv_hbt_comparatorInP HBT ultra-fast comparatorplanned
of_ams_iiiv_hbt_dacInP HBT high-speed DACplanned
of_ams_iiiv_hbt_thInP HBT track-and-hold amplifierplanned
of_ams_iiiv_hbt_vcoInP HBT millimeter-wave VCOplanned
of_ams_iiiv_hbt_dividerInP HBT static frequency dividerplanned
of_ams_iiiv_hbt_driverInP HBT optical modulator driverplanned
of_ams_iiiv_tia_pinInP/InGaAs photoreceiver TIAplanned
of_ams_iiiv_phemt_opampGaAs pHEMT wideband amplifierplanned
of_ams_iiiv_phemt_biasGaAs pHEMT bias and sequencing controllerplanned