IP PortfolioDatapath and DSPnumber theory
of_ntt_butterfly
Number-theoretic transform butterfly and engine
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 3
Cooley-Tukey / Gentleman-Sande butterfly array with twiddle ROM and in-place memory scheduling for NTT and inverse NTT over configurable prime moduli.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| s_in | in | AXI4-Stream | 64 | |
| m_out | out | AXI4-Stream | 64 |
Standards
No external standard applies.
More in number theory
| ID | Block | Maturity |
|---|---|---|
| of_mod_addsub | Modular adder and subtractor | planned |
| of_mont_mul | Montgomery modular multiplier | planned |
| of_barrett_red | Barrett modular reducer | planned |