IP PortfolioDatapath and DSPinteger arithmetic
of_sqrt
Integer square root
Maturity simulatedTargets FPGA + ASICDifficulty MediumPriority 1
Sequential digit-by-digit (restoring, radix-2) integer square root: root = floor(sqrt(x)), remainder = x - root^2; one root bit per cycle.
Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| x | in | valid-qualified bus | 32 | |
| root | out | valid-qualified bus | 32 |
Standards
No external standard applies.
More in integer arithmetic
| ID | Block | Maturity |
|---|---|---|
| of_add_ripple | Ripple-carry adder | simulated |
| of_add_cla | Carry-lookahead adder | simulated |
| of_add_csel | Carry-select adder | simulated |
| of_add_kogge_stone | Kogge-Stone parallel-prefix adder | fpga-routed |
| of_add_brent_kung | Brent-Kung parallel-prefix adder | simulated |
| of_add_sklansky | Sklansky parallel-prefix adder | simulated |
| of_addsub | Adder/subtractor with flags | simulated |
| of_inc | Incrementer / decrementer | simulated |
| of_abs | Absolute value | simulated |
| of_cmp | Magnitude comparator | simulated |