IP PortfolioPhysical IPphysical-only cells
of_sc_tie_antenna
Tie and antenna diode cells
Maturity plannedTargets ASIC (CMOS) onlyDifficulty EasyPriority 1
Tie-high and tie-low cells and antenna diode cells used by place and route to fix gate tie-offs and plasma-induced antenna violations.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
No external interfaces are defined for this entry yet.
Standards
- LEF/DEF 5.8
More in physical-only cells
| ID | Block | Maturity |
|---|---|---|
| of_sc_tap | Well tap cells | planned |
| of_sc_decap | Decoupling capacitor cells | planned |
| of_sc_filler | Filler cells | planned |
| of_sc_endcap | Endcap and boundary cells | planned |