IP PortfolioInterface controllerscan
of_canxl
CAN XL controller
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 3
CAN XL controller with payloads up to 2048 bytes, SDU type and VCID fields, PWM-coded fast phase for SIC XL transceivers and CAN FD fallback.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| can_tx | out | serial | 1 | |
| can_rx | in | serial | 1 |
Standards
- ISO 11898-1:2024
- CiA 610-1