IP PortfolioInterface controllersdebug
of_cjtag
Compact JTAG (IEEE 1149.7) adapter
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 3
Two-pin compact JTAG adapter converting TMSC/TCKC scan format to a standard 1149.1 TAP, with escape and selection sequences.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| tckc | in | clock | 1 | |
| tmsc | inout | serial | 1 | |
| tap | out | parallel | 4 |
Standards
- IEEE 1149.7-2009
More in debug
| ID | Block | Maturity |
|---|---|---|
| of_swd_dp | Serial Wire Debug port | planned |