IP PortfolioInterface controllersgpio
of_gpio
GPIO controller
Maturity fpga-routedTargets FPGA + ASICDifficulty EasyPriority 1
General-purpose I/O block with per-pin direction, output data, input synchronisation and edge or level interrupts.
FPGA-routed. The block meets timing on a routed FPGA netlist at a stated clock and its testbench passes on that netlist. It has not yet run on a board or in silicon.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| gpio_in | in | parallel | 32 | |
| gpio_out | out | parallel | 32 | |
| gpio_oe | out | parallel | 32 |
Standards
No external standard applies.