IP PortfolioInterface controllersaudio
of_spdif
S/PDIF transmitter and receiver
Maturity plannedTargets FPGA + ASICDifficulty EasyPriority 3
IEC 60958 digital audio transmitter and receiver with biphase-mark coding, channel status and user bits, and receiver clock recovery.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| spdif_out | out | serial | 1 | |
| spdif_in | in | serial | 1 | |
| pcm_tx | in | AXI4-Stream | 32 | |
| pcm_rx | out | AXI4-Stream | 32 |
Standards
- IEC 60958-1
- IEC 60958-3
More in audio
| ID | Block | Maturity |
|---|---|---|
| of_i2s_tdm | I2S / TDM audio port | simulated |
| of_pdm_mic | PDM microphone interface | planned |
| of_soundwire | MIPI SoundWire manager | planned |