of_sec_otp_ctrl
OTP controller
Maturity plannedTargets ASIC (CMOS) onlyDifficulty HardPriority 1
OTP controller with secret and software partitions, ECC, integrity digests, partition locks and background consistency checks.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
Standards
No external standard applies.
Basis projects
Permissive open projects the implementation may build on.
- OpenTitan (Apache-2.0)
Notes
Needs a foundry OTP or eFuse macro; the controller itself is digital.
More in lifecycle
| ID | Block | Maturity |
|---|---|---|
| of_sec_lc_ctrl | Lifecycle controller | planned |
| of_sec_rollback_counter | Anti-rollback counter | planned |
| of_sec_bbram_rtc | Battery-backed key store with tamper inputs | planned |