IP PortfolioSecurityregional_cipher
of_sec_sm4
SM4 block cipher engine
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2
SM4 encrypt and decrypt core with ECB, CBC, CTR, GCM and XTS modes.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| data_in | in | AXI4-Stream | 128 | |
| data_out | out | AXI4-Stream | 128 |
Standards
- GB/T 32907-2016
- ISO/IEC 18033-3:2010/Amd 1:2021
More in regional_cipher
| ID | Block | Maturity |
|---|---|---|
| of_sec_aria | ARIA block cipher engine | planned |
| of_sec_camellia | Camellia block cipher engine | planned |
| of_sec_mobile_ciphers | 3GPP confidentiality and integrity engine | planned |