IP PortfolioSensing and RFinfrared
of_ir_nuc
Non-uniformity correction engine
Maturity simulatedTargets FPGA + ASICDifficulty MediumPriority 1
Per-pixel two-point gain and offset correction with shutter-based or scene-based offset updates and bad pixel replacement.
Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | AXI4-Lite control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| raw | in | AXI4-Stream | 16 | |
| corrected | out | AXI4-Stream | 16 |
Standards
No external standard applies.
More in infrared
| ID | Block | Maturity |
|---|---|---|
| of_ir_bolometer_roic | Microbolometer ROIC | planned |
| of_ir_ingaas_swir_roic | InGaAs SWIR ROIC | planned |
| of_ir_mwir_lwir_roic | MWIR/LWIR cooled ROIC | planned |
| of_ir_iiiv_ingaas_fpa | InGaAs photodiode focal plane array | planned |
| of_ir_iiiv_t2sl_fpa | Type-II superlattice infrared detector array | planned |
| of_ir_thermal_isp | Thermal image processor | planned |
| of_ir_radiometry | Radiometric temperature engine | planned |
| of_ir_gas_ndir | NDIR gas detection processor | planned |
| of_ir_ogi | Optical gas imaging processor | planned |