IP PortfolioAnalog and mixed-signalclocking

of_ams_phase_interp

Phase interpolator

Maturity plannedTargets ASIC (CMOS) onlyDifficulty HardPriority 2

Current-mode interpolator that mixes quadrature clock phases under a digital code to produce a programmable phase shift.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
clkiindifferential pair1 
clkqindifferential pair1 
codeinparallel7 
clkoutoutdifferential pair1 

Standards

No external standard applies.

More in clocking

IDBlockMaturity
of_ams_pll_intnInteger-N charge-pump PLLplanned
of_ams_pll_fracnFractional-N PLL with delta-sigma modulatorplanned
of_ams_adpllAll-digital PLLplanned
of_ams_vco_ringRing voltage-controlled oscillatorplanned
of_ams_vco_lcLC voltage-controlled oscillatorplanned
of_ams_dllDelay-locked loopplanned
of_ams_cdrClock and data recoveryplanned
of_ams_xoCrystal oscillator driverplanned
of_ams_xo_32k32.768 kHz low-power crystal oscillatorplanned
of_ams_rcoscTrimmed RC oscillatorplanned