IP PortfolioDatapath and DSPdsp transforms and oscillators
of_dct
2D DCT / IDCT
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 3
8x8 and 4x4 two-dimensional DCT-II and inverse with row-column decomposition and transpose memory, bit-exact to the JPEG and H.264 integer transforms.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| s_in | in | AXI4-Stream | 64 | |
| m_out | out | AXI4-Stream | 64 |
Standards
- ISO/IEC 10918-1
- ITU-T H.264
More in dsp transforms and oscillators
| ID | Block | Maturity |
|---|---|---|
| of_fft_stream | Streaming pipelined FFT/IFFT | planned |
| of_fft_mem | Memory-based mixed-radix FFT | planned |
| of_cordic | CORDIC rotator and vectoring unit | fpga-routed |
| of_nco | NCO / direct digital synthesizer | simulated |
| of_window | Window function generator | planned |