IP PortfolioInterface PHYsethernet_phy
of_eth_gearbox_112g
112G Ethernet retimer/gearbox
Maturity plannedTargets ASIC (CMOS) onlyDifficulty Very hardPriority 3
Ethernet retimer and gearbox that converts between 4x56G or 8x56G host lanes and 2x112G or 4x112G line lanes with FEC termination or pass-through.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| host_tx | out | differential pair | 8 | |
| host_rx | in | differential pair | 8 | |
| line_tx | out | differential pair | 4 | |
| line_rx | in | differential pair | 4 | |
| refclk | in | differential pair | 1 |
Standards
- IEEE 802.3ck-2022
- IEEE 802.3bs-2017
More in ethernet_phy
| ID | Block | Maturity |
|---|---|---|
| of_eth_phy_100base_tx | 10/100BASE-TX Ethernet PHY | planned |
| of_eth_phy_1000base_t | 10/100/1000BASE-T Ethernet PHY | planned |
| of_eth_phy_nbase_t | 2.5G/5GBASE-T Ethernet PHY | planned |
| of_eth_phy_10gbase_t | 10GBASE-T Ethernet PHY | planned |
| of_eth_phy_100base_t1 | 100BASE-T1 automotive Ethernet PHY | planned |
| of_eth_phy_1000base_t1 | 1000BASE-T1 automotive Ethernet PHY | planned |
| of_eth_phy_mgig_t1 | 2.5G/5G/10GBASE-T1 automotive PHY | planned |
| of_eth_phy_10base_t1s | 10BASE-T1S multidrop PHY | planned |
| of_eth_phy_10base_t1l | 10BASE-T1L long-reach PHY | planned |
| of_eth_phy_10gbase_kr | 10GBASE-KR backplane PHY | planned |