IP PortfolioProcessorslinux_soc
of_cpu_linux_soc
Embedded Linux SoC subsystem
Maturity plannedTargets FPGA + ASICDifficulty Very hardPriority 1
Quad RV64GC cluster with shared L2, PLIC, ACLINT, boot ROM, debug and a DRAM controller port, packaged to boot an SBI firmware and Linux.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| uart_tx | out | serial | 1 | |
| uart_rx | in | serial | 1 |
Standards
- RISC-V RVA22U64 Profile
- RISC-V SBI 2.0
- Devicetree Specification 0.4