IP PortfolioQuantum controltrapped_ion

of_q_aom_dds

AOM RF tone generator

Maturity simulatedTargets FPGA + ASICDifficulty MediumPriority 1

Phase-coherent DDS channels with amplitude, frequency and phase ramps and profile switching for acousto-optic and electro-optic modulators.

Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAPB control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request
dac_outoutAXI4-Stream256 
profile_selinparallel4 

Standards

No external standard applies.

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