IP PortfolioQuantum controltrapped_ion
of_q_photon_counter
Photon counting and state detection
Maturity simulatedTargets FPGA + ASICDifficulty EasyPriority 1
Gated counters with timestamping on PMT or SPAD pulses and threshold-based bright and dark state detection per ion.
Simulated. The RTL is lint clean and passes its self-checking testbench against a reference model in simulation. It has not been run on an FPGA board or in silicon.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| pulses_in | in | parallel | 16 | |
| state_out | out | valid-qualified bus | 16 |
Standards
No external standard applies.
More in trapped_ion
| ID | Block | Maturity |
|---|---|---|
| of_q_aom_dds | AOM RF tone generator | simulated |
| of_q_aod_multitone | AOD multi-tone synthesiser | planned |
| of_q_ttl_sequencer | TTL and laser shutter sequencer | simulated |
| of_q_ion_transport | Ion transport waveform engine | planned |
| of_q_trap_rf_stab | Trap RF amplitude stabiliser | planned |
| of_q_ion_gate_pulse | Ion entangling gate pulse shaper | planned |