of_sec_aes_keywrap
AES key wrap engine
Maturity plannedTargets FPGA + ASICDifficulty EasyPriority 2
AES Key Wrap and Key Wrap with Padding for importing and exporting keys without exposing them to software.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
Standards
- NIST FIPS 197
- NIST SP 800-38F
- RFC 3394
- RFC 5649
More in aes
| ID | Block | Maturity |
|---|---|---|
| of_sec_aes_core | AES block cipher core | simulated |
| of_sec_aes_modes | AES modes engine | simulated |
| of_sec_aes_gcm | AES-GCM authenticated encryption engine | planned |
| of_sec_aes_xts | AES-XTS storage encryption engine | simulated |
| of_sec_aes_masked | Side-channel protected AES | planned |
| of_sec_aes_gcm_siv | AES-GCM-SIV engine | planned |