IP PortfolioSecuritykey_mgmt

of_sec_key_manager

Key manager

Maturity plannedTargets FPGA + ASICDifficulty HardPriority 1

Key derivation ladder that combines device secrets, lifecycle state and software binding into versioned keys delivered through sideload ports.

Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.

Interfaces

PortDirectionKindWidthNotes
ctrlin/outAPB control bus32Control and status registers, including ID, VERSION and STATUS
irqoutinterrupt1Interrupt request
key_outoutvalid-qualified bus256 

Standards

No external standard applies.

Basis projects

Permissive open projects the implementation may build on.

More in key_mgmt

IDBlockMaturity
of_sec_key_vaultKey vaultsimulated
of_sec_key_ladderContent protection key ladderplanned