IP PortfolioSoC interconnectsystem management
of_addr_remap
Address remap unit
Maturity plannedTargets FPGA + ASICDifficulty EasyPriority 2
Programmable region-based address translation for boot aliasing and window relocation, with per-region base, size and target offset.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| s_axi | in | valid-qualified bus | 256 | AXI4 slave port (AW/W/AR channels) |
| m_axi | out | valid-qualified bus | 256 | AXI4 master port (AW/W/AR channels) |
Standards
No external standard applies.
More in system management
| ID | Block | Maturity |
|---|---|---|
| of_bootrom_ctrl | Boot ROM and boot-mode controller | simulated |
| of_sysctrl | System controller | simulated |
| of_pinmux | Pin multiplexer | simulated |