IP PortfolioSoC interconnectmonitoring and error reporting
of_axi_perfmon
AXI4 performance monitor
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2
Passive AXI4 monitor counting transactions, bytes, latency histograms and outstanding requests per ID or address window.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| ctrl | in/out | APB control bus | 32 | Control and status registers, including ID, VERSION and STATUS |
| irq | out | interrupt | 1 | Interrupt request |
| mon | in | valid-qualified bus | 256 |
Standards
- AMBA AXI4
More in monitoring and error reporting
| ID | Block | Maturity |
|---|---|---|
| of_hpm_counters | Hardware event counter bank | planned |
| of_ras_reri | RAS error record unit (RERI) | planned |
| of_bus_timeout | Bus transaction timeout monitor | planned |