IP PortfolioVerification IPethernet vip
of_vip_eth_pkt_gen
Ethernet packet generator and checker
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2
Layered packet generator for Ethernet, VLAN, IPv4/IPv6, UDP and TCP headers with checksum, length and error-field control, and a matching packet checker.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| m_pkt | out | AXI4-Stream | 64 | |
| s_pkt | in | AXI4-Stream | 64 |
Standards
- IEEE 802.3
- IEEE 802.1Q
Basis projects
Permissive open projects the implementation may build on.
- cocotbext-eth (MIT)
More in ethernet vip
| ID | Block | Maturity |
|---|---|---|
| of_vip_eth_mii_mon | Ethernet MII/RMII/GMII/RGMII monitor and protocol checker | simulated |
| of_vip_eth_mii_bfm | Ethernet MII/RMII/GMII/RGMII bus functional model and agent | simulated |
| of_vip_eth_xgmii_mon | Ethernet XGMII/XLGMII/CGMII monitor and protocol checker | planned |
| of_vip_eth_xgmii_bfm | Ethernet XGMII/XLGMII/CGMII bus functional model and agent | planned |