IP PortfolioVerification IPstorage vip
of_vip_sd_emmc_mon
SD / eMMC monitor and protocol checker
Maturity plannedTargets FPGA + ASICDifficulty MediumPriority 2
SD and eMMC bus monitor decoding commands, responses and data blocks with CRC7/CRC16 checks, bus width and speed mode transitions and tuning.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| tap | in | parallel | 12 | Observed interface signals |
| txn | out | AXI4-Stream | 128 | Decoded transactions for scoreboards |
Standards
- SD Physical Layer Specification 9.10
- JEDEC JESD84-B51
More in storage vip
| ID | Block | Maturity |
|---|---|---|
| of_vip_sd_emmc_bfm | SD card and eMMC device model | planned |
| of_vip_ufs_mon | UFS monitor and protocol checker | planned |
| of_vip_ufs_bfm | UFS bus functional model and agent | planned |
| of_vip_nvme_host | NVMe host agent and device model | planned |