IP PortfolioVerification IPdisplay vip
of_vip_dp_bfm
DisplayPort bus functional model and agent
Maturity plannedTargets FPGA + ASICDifficulty HardPriority 3
DisplayPort source and sink agents with AUX channel DPCD model, link training and video stream generation.
Planned. This block is specified in the catalog with its interfaces and targets. No implementation exists yet; the skeleton command below generates a lint-clean shell with its ports and registers.
Interfaces
| Port | Direction | Kind | Width | Notes |
|---|---|---|---|---|
| main_link | out | differential pair | 4 | |
| aux | inout | differential pair | 1 |
Standards
- VESA DisplayPort 2.1
More in display vip
| ID | Block | Maturity |
|---|---|---|
| of_vip_hdmi_mon | HDMI monitor and protocol checker | planned |
| of_vip_hdmi_bfm | HDMI bus functional model and agent | planned |
| of_vip_dp_mon | DisplayPort monitor and protocol checker | planned |